Microprocessor - 8086 Instruction Sets

MICROPROCESSOR - 8086 INSTRUCTION SETS
The first generation of computer language was the machine language in which to get an operation from the microprocessor it was to be instructed by supplying a sequence of zeros (0) and ones (1), but remembering the binary code for different operations was cumbersome. So some symbolic names called 'mnemonic' were developed which are easy to remember by the programmer. These mnemonics are called the instructions of the microprocessor. The set of different mnemonics used for programming the microprocessor are called the instruction set, and the language using the mnemonics is called assembly language. The instruction set of the 8086 fall under the following groups according to their functionality. The 8086 microprocessor supports 8 types of instructions −
1.      Data Transfer Instructions
2.      Arithmetic Instructions
3.      Logical Instructions OR Bit Manipulation Instructions
4.      String Manipulation Instructions
5.      Program Execution Transfer Instructions (Branch & Loop Instructions OR Iteration Control Instructions)
6.      Flag Manipulation, Processor Control Instructions & Machine Control Instructions
Let us now discuss these instruction sets in detail.
1.      Data Transfer Instructions
All the instructions which perform data movement come under this category. These instructions are used to transfer the data from the source operand to the destination operand. The source data may be a register, memory location, port etc. the destination may be a register, memory location or port. The following instructions come under this category:
Instruction
Description
Instruction to transfer a word
MOV
Used to copy the byte or word from the provided source to the provided destination. (Moves data from register to register, register to memory, memory to register, memory to accumulator, accumulator to memory, etc.) (Algorithm: operand1 = operand2 Ex - MOV DS, AX)
XLAT/XLATB
Reads a byte from the lookup table. (Used to translate a byte in AL using a table in the memory.) (DS:[BX + unsigned AL] = AL  )
XCHG
Exchanges the contents of the 16-bit or 8-bit specified register with the contents of AX register, specified register or memory locations. (operand1 < - > operand2 )
PUSH
Pushes (sends, writes or moves) the content of a specified register or memory location(s) onto the top of the stack. (PUSH AX, PUSH CX, PUSH DX etc.)
PUSHA
Used to put all the registers into the stack.
POP
Pops (reads) two bytes from the top of the stack and keeps them in a specified register, or memory location(s). (POP DI, POP SI, POP BP, POP BX etc.)
POPA
Used to get words from the stack to all registers.
Instructions to transfer the address
LDS
Loads a word from the specified memory locations into specified register. It also loads a word from the next two memory locations into DS register. (Used to load DS register and other provided register from the memory) (LDS Algorithm: REG = first word, DS = second word )
LES
Loads a word from the specified memory locations into the specified register. It also loads a word from next two memory locations into ES register. (Used to load ES register and other provided register from the memory.) (LES Algorithm: REG = first word, ES = second word)
LEA
Loads offset address into the specified register. (Used to load the address of operand into the provided register.) (LEA Algorithm: REG = address of memory (offset) )
Instructions to transfer flag registers
LAHF
Loads low order 8-bits of the flag register into AH register. ( LAHF Algorithm: AH = flags register)
SAHF
Stores the content of AH register into low order bits of the flags register. (SAHF Algorithm: flags register = AH)
PUSHF
Used to copy the flag register at the top of the stack.
POPF
Pops (reads) two bytes from the top of the stack and keeps them in the flag register.
Instructions for input and output port transfer
IN
Transfers data from a port to the accumulator or AX, DX or AL register. (Example: IN AX, 4  ; )
OUT
Transfers data from accumulator or AL or AX register to an I/O port identified by the second byte of the instruction. (Example: OUT 7, AL;.)

2.      Arithmetic Instructions
These instructions are used to perform arithmetic operations like addition, subtraction, multiplication, division, increment, decrement, comparison, ASCII and decimal adjustment etc.
The following instructions come under this category:
Instruction
Description
Instructions to perform addition
ADD
Adds data to the accumulator i.e. AL or AX register or memory locations. (ADD Algorithm: operand1 = operand1 + operand2 )
Example: - MOV AL, 5   ; AL = 5
ADD AL, -3  ; AL = 2
RET
ADC
Adds specified operands and the carry status (i.e. carry of the previous stage). (Add with carry.) (ADC Algorithm: operand1 = operand1 + operand2 + CF )
Example: - STC        ; set CF = 1
MOV AL, 5  ; AL = 5
ADC AL, 1  ; AL = 7
RET
INC
Increment Register or memory by 1. (Increment the provided byte/word by 1.) (Algorithm: operand = operand + 1 Ex- MOV AL, 4   INC AL ; AL = 5)
DAA
Decimal Adjust after BCD Addition: When two BCD numbers are added, the DAA is used after ADD or ADC instruction to get correct answer in BCD. (DAA Algorithm:  if low nibble of AL > 9 or AF = 1 then: AL = AL + 6, AF = 1 if AL > 9Fh or CF = 1 then: AL = AL + 60h , CF = 1)
AAA
ASCII Adjust for Addition: When ASCII codes of two decimal digits are added, the AAA is used after addition to get correct answer in unpacked BCD. (AAA Algorithm: if low nibble of AL > 9 or AF = 1 then: AL = AL + 6, AH = AH + 1, AF = 1, CF = 1 else AF = 0, CF = 0)
Example
MOV AX, 15   ; AH = 00, AL = 0Fh
AAA          ; AH = 01, AL = 05
RET
Instructions to perform subtraction
SUB
Subtract immediate data from accumulator, memory or register. (Algorithm: operand1 = operand1 - operand2  )
SBB
Subtract immediate data with borrow from accumulator, memory or register. (Algorithm: operand1 = operand1 - operand2 - CF  )
DEC
Decrement register or memory by 1. (DEC Algorithm: operand = operand - 1 )
NEG
Obtains 2's complement (i.e. negative) of the content of an 8-bit or 16-bit specified register or memory location(s). (NEG Algorithm: Invert all bits of the operand, Add 1 to inverted operand)
CMP
Compare Immediate data, register or memory with accumulator, register or memory location(s). (CMP Algorithm: operand1 - operand2 )
AAS
ASCII Adjust for Subtraction: This instruction is used to get the correct result in unpacked BCD after the subtraction of the ASCII code of a number from ASCII code another number. (AAS Algorithm: if low nibble of AL > 9 or AF = 1 then: AL = AL – 6, AH = AH – 1, AF = 1, CF = 1 else AF = 0, CF = 0 )
Example:
MOV AX, 02FFh  ; AH = 02, AL = 0FFh
AAS            ; AH = 01, AL = 09
RET
DAS
Decimal Adjust after BCD Subtraction: When two BCD numbers are added, the DAS is used after SUB or SBB instruction to get correct answer in BCD. (DAS Algorithm: if low nibble of AL > 9 or AF = 1 then: AL = AL – 6, AF = 1 if AL > 9Fh or CF = 1 then: AL = AL - 60h, CF = 1)
Instruction to perform multiplication
MUL
Unsigned 8-bit or 16-bit multiplication. (MUL Algorithm: when operand is a byte: AX = AL * operand. , when operand is a word: (DX AX) = AX * operand.)
IMUL
Signed 8-bit or 16-bit multiplication. (IMUL Algorithm: when operand is a byte: AX = AL * operand., when operand is a word: (DX AX) = AX * operand.)
AAM
Adjust result of BCD Multiplication: This instruction is used after the multiplication of two unpacked BCD. (AAM Algorithm: AH = AL / 10, AL = remainder)
Example:
MOV AL, 15   ; AL = 0Fh
AAM          ; AH = 01, AL = 05
RET
Instructions to perform division
DIV
Unsigned 8-bit or 16-bit division. (DIV Algorithm: when operand is a byte: AL = AX / operand,  AH = remainder (modulus) when operand is a word: AX = (DX AX) / operand,  DX = remainder (modulus))
IDIV
Signed 8-bit or 16-bit division. (IDIV Algorithm: when operand is a byte: AL = AX / operand, AH = remainder (modulus), when operand is a word: AX = (DX AX) / operand, DX = remainder (modulus))
AAD
Adjust AX Register for Division: It converts two unpacked BCD digits in AX to the equivalent binary number. This adjustment is done before dividing two unpacked BCD digits in AX by an unpacked BCD byte. (AAD Algorithm:  AL = (AH * 10) + AL,  AH = 0)
Example:
MOV AX, 0105h   ; AH = 01, AL = 05
AAD             ; AH = 00, AL = 0Fh (15)
RET
CBW
Convert signed Byte to signed Word. (Used to fill the upper byte of the word with the copies of sign bit of the lower byte.) (CBW Algorithm: if high bit of AL = 1 then: AH = 255 (0FFh) else AH = 0)
Example: - MOV AX, 0   ; AH = 0, AL = 0
MOV AL, -5  ; AX = 000FBh (251)
CBW         ; AX = 0FFFBh (-5)
RET
CWD
Convert signed Word to signed Double-word. (Used to fill the upper word of the double word with the sign bit of the lower word.) (CWD Algorithm: if high bit of AX = 1 then: DX = 65535 (0FFFFh) else DX = 0) 

3.      Logical Instructions OR Bit Manipulation Instructions
These instructions are used to perform operations where data bits are involved, i.e. operations like logical, shift, etc.
The following instructions come under this category:
Instruction
Description
Instructions to perform logical operation
AND
Performs bit by bit logical AND operation of two operands and places the result in the specified destination. (AND rules :- 1 AND 1 = 1, 1 AND 0 = 0, 0 AND 1 = 0, 0 AND 0 = 0)
Example: - MOV AL, 'a'        ; AL = 01100001b
AND AL, 11011111b  ; AL = 01000001b  ('A')
RET
OR
Performs bit by bit logical OR operation of two operands and places the result in the specified destination. (OR rules: 1 OR 1 = 1, 1 OR 0 = 1, 0 OR 1 = 1, 0 OR 0 = 0)
Example: OR AL, 00100000b  ; AL = 01100001b  ('a')
XOR
Performs bit by bit logical XOR operation of two operands and places the result in the specified destination. (rules:- 1 XOR 1 = 0, 1 XOR 0 = 1, 0 XOR 1 = 1, 0 XOR 0 = 0)
NOT
Takes one's complement of the content of a specified register or memory location(s). (Used to invert each bit of a byte or word.)
TEST
Perform logical AND operation of a specified operand with another specified operand. (Used to add operands to update flags, without affecting operands.) (rules : 1 AND 1 = 1, 1 AND 0 = 0, 0 AND 1 = 0, 0 AND 0 = 0)
Instructions to perform rotate operations
RCL
Rotate all bits of the operand left by specified number of bits through carry flag. (Used to rotate bits of byte/word towards the left, i.e. MSB to CF and CF to LSB.) (RCL Algorithm: shift all bits left, the bit that goes off is set to CF and previous value of CF is inserted to the right-most position.)
RCR
Rotate all bits of the operand right by specified number of bits through carry flag. (Used to rotate bits of byte/word towards the right, i.e. LSB to CF and CF to MSB.) (RCR Algorithm: shift all bits right, the bit that goes off is set to CF and previous value of CF is inserted to the left-most position.)
Example: RCR AL, 1         ; AL = 10001110b,  CF=0.
ROL
Rotate all bits of the operand left by specified number of bits. (Used to rotate bits of byte/word towards the left, i.e. MSB to LSB.) (ROL Algorithm: shift all bits left, the bit that goes off is set to CF and the same bit is inserted to the right-most position.)
Example: ROL AL, 1         ; AL = 00111000b,  CF=0.
ROR
Rotate all bits of the operand right by specified number of bits. (Used to rotate bits of byte/word towards the right, i.e. LSB to MSB.) (ROR Algorithm: shift all bits right, the bit that goes off is set to CF and the same bit is inserted to the left-most position.)
Example: ROR AL, 1         ; AL = 00001110b,  CF=0.
Instructions to perform shift operations
SAL or SHL
Shifts each bit of operand left by specified number of bits and put zero in LSB position. (SHL Algorithm: Shift all bits left, the bit that goes off is set to CF., Zero bit is inserted to the right-most position.) (SAL Algorithm: Shift all bits left, the bit that goes off is set to CF., Zero bit is inserted to the right-most position.)
SAR
Shift each bit of any operand right by specified number of bits. Copy old MSB into new MSB. (SAR Algorithm: Shift all bits right, the bit that goes off is set to CF., The sign bit that is inserted to the left-most position has the same value as before shift.)
SHR
Shift each bit of operand right by specified number of bits and put zero in MSB position. (SHR Algorithm: Shift all bits right, the bit that goes off is set to CF., Zero bit is inserted to the left-most position.)

4.      String Manipulation Instructions
These are the type of instructions used to manipulate strings. String is series of bytes or series of words stored in sequential memory locations. The 8086 provides some instructions which handle string operations such as string movement, comparison, scan, load and store.
The following instructions come under this category:
Instruction
Description
MOVS/MOVSB/MOVSW
Moves 8-bit or 16-bit data from the memory location(s) addressed by SI register to the memory location addressed by DI register. (Move String Byte/Word) (MOVSB Algorithm: ES:[DI] = DS:[SI], if DF = 0 then SI = SI + 1, DI = DI + 1 else SI = SI – 1, DI = DI – 1) (MOVSW Algorithm: ES:[DI] = DS:[SI], if DF = 0 then SI = SI + 2, DI = DI + 2 else SI = SI – 2, DI = DI – 2)
CMPS/CMPSB/CMPSW
Compares the content of memory location addressed by DI register with the content of memory location addressed by SI register. (Compare String Byte/Word) (CMPSB Algorithm: DS:[SI] - ES:[DI], set flags according to result: OF, SF, ZF, AF, PF, CF, if DF = 0 then SI = SI + 1, DI = DI + 1, else SI = SI – 1, DI = DI – 1) (CMPSW Algorithm: DS:[SI] - ES:[DI], set flags according to result: OF, SF, ZF, AF, PF, CF, if DF = 0 then SI = SI + 2, DI = DI + 2, else SI = SI – 2, DI = DI – 2 )
SCAS/SCASB/SCASW
Compares the content of accumulator with the content of memory location addressed by DI register in the extra segment ES. (Scan String Byte/Word) (SCASB Algorithm:  ES:[DI] – AL, set flags according to result: OF, SF, ZF, AF, PF, CF, if DF = 0 then DI = DI + 1, else DI = DI – 1) (SCASW Algorithm:  ES:[DI] – AX, set flags according to result: OF, SF, ZF, AF, PF, CF, if DF = 0 then DI = DI + 2 else DI = DI – 2)
LODS/LODSB/LODSW
Loads 8-bit or 16-bit data from memory location addressed by SI register into AL or AX register. (Load String Byte/Word) (LODSB Algorithm: AL = DS:[SI], if DF = 0 then SI = SI + 1 else SI = SI – 1) (LODSW Algorithm: AX = DS:[SI], if DF = 0 then SI = SI + 2 else SI = SI – 2)
STOS/STOSB/STOSW
Stores 8-bit or 16-bit data from AL or AX register in the memory location addressed by DI register. (Store String Byte/Word) (STOSB Algorithm: ES:[DI] = AL, if DF = 0 then DI = DI + 1 else DI = DI – 1) (STOSW Algorithm: ES:[DI] = AX, if DF = 0 then DI = DI + 2, else DI = DI – 2)
COMS/COMPSB/COMPSW
Used to compare two string bytes/words.
INS/INSB/INSW
Used as an input string/byte/word from the I/O port to the provided memory location.
OUTS/OUTSB/OUTSW
Used as an output string/byte/word from the provided memory location to the I/O port.
REP
Repeats the given instruction until CX ≠ 0 (Repeat Instruction Prefix) (REP Algorithm: check_cx: if CX <> 0 then do following chain instruction CX = CX – 1, go back to check_cx else exit from REP cycle)
REPE/ REPZ
Repeats the given instruction till CX = 0 or zero flag ZF = 0 (REPE: Repeat if equal. REPZ  : Repeat if zero) (REPE Algorithm: check_cx: if CX <> 0 then do following chain instruction CX = CX – 1, if ZF = 1 then: go back to check_cx else exit from REPE cycle) (REPZ Algorithm: check_cx: if CX <> 0 then do following chain instruction CX = CX – 1, if ZF = 1 then: go back to check_cx else exit from REPZ cycle)
REPNE/REPNZ
Repeats the given instruction till CX ≠ 0 and zero flag ZF = 1 (REPNE: Repeat if not equal. REPNZ : Repeat if not zero) (REPNE Algorithm: check_cx: if CX <> 0 then do following chain instruction CX = CX – 1, if ZF = 0 then: go back to check_cx else exit from REPNE cycle ) (REPNZ Algorithm: check_cx: if CX <> 0 then do following chain instruction CX = CX – 1, if ZF = 0 then: go back to check_cx else exit from REPNZ cycle)

5.      Program Execution Transfer Instructions (Branch & Loop Instructions OR Iteration Control Instructions)
These instructions are used to transfer/branch the instructions during an execution or these are the type of instructions used to control the transfer to a specified address. It is also called program execution transfer instruction. Instructions of this group transfer program execution from the normal sequence of instructions to the specified destination or target.
The following instructions come under this category:
Instruction
Description
Unconditional Branch Instructions
JMP
Causes the program execution to jump unconditionally to the memory address or label given in the instruction. (JMP Algorithm: always jump)
CALL
Calls a procedure whose address is given in the instruction and saves their return address to the stack. (Call a subroutine Unconditionally)
Example:
ORG 100h; for COM file.
CALL p1
ADD AX, 1
RET         ; return to OS.
p1 PROC     ; procedure declaration.
    MOV AX, 1234h
    RET     ; return to caller.
p1 ENDP
RET
Returns program execution from a procedure (subroutine) to the next instruction or main program. (RET Algorithm: Pop from stack: IP, if immediate operand is present: SP = SP + operand )
Conditional Branch Instructions
JA or JNBE
Jump if above, not below, or equal i.e. when CF and ZF = 0 (JA Algorithm: - if (CF = 0) and (ZF = 0) then jump( JNBE Algorithm: if (CF = 0) and (ZF = 0) then jump )
JAE/JNB/JNC
Jump if above, not below, equal or no carry i.e. when CF = 0 (JAE Algorithm: if CF = 0 then jump( JNB Algorithm: if CF = 0 then jump) ( JNC Algorithm: if CF = 0 then jump )
JB/JNAE/JC
Jump if below, not above, equal or carry i.e. when CF = 1 (JB Algorithm: if CF = 1 then jump)( JC Algorithm: if CF = 1 then jump ) (JNAE Algorithm: if CF = 1 then jump)
JBE/JNA
Jump if below, not above, or equal i.e. when CF and ZF = 1 (JBE Algorithm: if CF = 1 or ZF = 1 then jump(JNA Algorithm: if CF = 1 or ZF = 1 then jump )
JE/JZ
Jump if zero or equal i.e. when ZF = 1(JE Algorithm: if ZF = 1 then jump( JZ Algorithm: if ZF = 1 then jump )
JG/JNLE
Jump if greater, not less or equal i.e. when ZF = 0 and CF = OF (JG Algorithm: if (ZF = 0) and (SF = OF) then jump(JNLE Algorithm: if (SF = OF) and (ZF = 0) then jump)
JGE/JNL
Jump if greater, not less or equal i.e. when SF = OF (JNL Algorithm: if SF = OF then jump ) (JGE Algorithm: if SF = OF then jump)
JL/JNGE
Jump if less, not greater than or equal i.e. when SF ≠ OF (JNGE Algorithm: if SF <> OF then jump ) (JL Algorithm: if SF <> OF then jump)
JLE/JNG
Jump if less, equal or not greater i.e. when ZF = 1 and SF ≠ OF (JLE Algorithm: if SF <> OF or ZF = 1 then jump(JNG Algorithm: if (ZF = 1) and (SF <> OF) then jump)
JNE/JNZ
Used to jump if not equal/zero flag ZF = 0 (JNE Algorithm: if ZF = 0 then jump) (JNZ Algorithm: if ZF = 0 then jump)
JNP/JPO
Used to jump if not parity/parity odd PF = 0 (JNP Algorithm: if PF = 0 then jump) (JPO Algorithm: if PF = 0 then jump )
JP/JPE
Used to jump if parity/parity even PF = 1(JP Algorithm: if PF = 1 then jump)  (JPE Algorithm: if PF = 1 then jump)
JO
Jump on Over flow flag OF = 1 (JO Algorithm: if OF = 1 then jump)
JNO
Jump on not Over flow flag OF = 0 (JNO Algorithm: if OF = 0 then jump)
JS
Jump on Sign flag SF = 1 (JS Algorithm: if SF = 1 then jump )
JNS
Jump on not Sign SF = 0 (JNS Algorithm: if SF = 0 then jump)
RETF
Return from Far procedure. (RETF Algorithm: Pop from stack: IP, CS, if immediate operand is present: SP = SP + operand)
Loop Instructions (Iteration Control Instructions)
Unconditional Loop Instructions
LOOP
Jump to defined label until CX = 0. (Used to loop a group of instructions until the condition satisfies, i.e., CX = 0) (LOOP Algorithm: CX = CX – 1, if CX <> 0 then jump else no jump, continue)
Conditional Loop Instructions
JCXZ
Jump if CX register = 0 (JCXZ Algorithm: if CX = 0 then jump)
LOOPZ/LOOPE
Decrement CX register and jump if CX = 0 and ZF = 1. (LOOPZ  : Loop if zero / LOOPE  : Loop if equal) (LOOPE Algorithm: CX = CX – 1, if (CX <> 0) and (ZF = 1) then jump else no jump, continue) (LOOPZ Algorithm: CX = CX – 1, if (CX <> 0) and (ZF = 1) then jump else no jump, continue)
LOOPNZ/LOOPNE
Decrement CX register and jump if CX ≠ 0 and ZF = 0.  (LOOPNZ : Loop if not zero / LOOPNE : Loop if not equal) (LOOPNZ Algorithm: CX = CX – 1, if (CX <> 0) and (ZF = 0) then jump else no jump, continue) (LOOPNE Algorithm: CX = CX – 1, if (CX <> 0) and (ZF = 0) then jump else no jump, continue )
Interrupt Instructions
IRET
Returns program execution from an interrupt service procedure (subroutine) to the main program. (return from interrupt service to the main program) (IRET Algorithm: Pop from stack: IP, CS, flags register)
INT
Used to generate software interrupt at the desired point in a program. (Interrupt the program during execution and calling service specified.) (INT Algorithm: Push to stack: flags register, CS, IP, IF = 0 , Transfer control to interrupt procedure)
INTO
Software interrupts to indicate overflow after arithmetic operation. (interrupt the program during execution if Over flow OF = 1) (INTO Algorithm: if OF = 1 then INT 4 )
6.      Flag Manipulation, Processor Control Instructions & Machine Control Instructions
Instructions of this instruction set are related to flag manipulation, Processor Control Instructions and machine control. The following instructions come under this category:
Instruction
Description
Flag Manipulation and Processor Control Instructions
CLC
Clear Carry Flag: This instruction resets the carry flag CF to 0. (CF = 0)
CLD
Clear Direction Flag: This instruction resets the direction flag DF to 0. (DF = 0  )
CLI
Clear Interrupt Flag: This instruction resets the interrupt flag IF to 0. i.e., disable INTR input. (IF = 0  )
CMC
This instruction take complement of carry flag CF. (if CF = 1 then CF = 0 or if CF = 0 then CF = 1)
STC
Set carry flag CF to 1. (CF = 1 )
STD
Set direction flag DF to 1. (DF = 1  )
STI
Set interrupt flag IF to 1. , i.e., enable INTR input. (IF = 1  )
Machine Control Instructions
HLT
Halt processing. It stops program execution.
NOP
Performs no operation. (No operation)
ESC
Escape: makes bus free for external master like a coprocessor or peripheral device.
WAIT
When WAIT instruction is executed, the processor enters an idle state in which the processor does no processing. (Wait for the test input to go low)
LOCK
It is a prefix instruction. It makes the LOCK pin low till the execution of the next instruction. (Lock instruction prefix)

REFERENCE

1.      Microcomputer Systems: 8086/8088 Family - Architecture, Programming, and Design; Y. Liu and G. A. Gibson, 2nd Ed., PHI.
2.      Microprocessor & Interfacing – D. Hall, TMH
3.      The 8086 Microprocessor: Programming & Interfacing the PC, Kenneth J. Ayala, Penram International Publishing (India).
4.      The Intel 8086/8088 Microprocessor Architecture, Programming Design & Interfacing – B.S. Chhabra, Dhanpat Rai Publishing Company.
5.      The Intel Microprocessor 8086/8088, 80186/80188, 80286, 80386, 80486, Pentium & Pentium Pro Processor: Architecture, Programming & Interfacing – Brey & Sharma, Pearson Education.
6.      Advanced microprocessor, Rajasree, New Age International Publishers
7.      Fundamentals of Microprocessor and Microcomputers – B. Ram, Dhanpat Rai Publishing Company.
8.      Microprocessors: Principles and Applications by A Pal
9.      Advanced Microprocessors and Peripherals by A K Ray and K M Bhurchandi
10.  Microprocessors and Microcontrollers : Architecture, Programming and Interfacing Using 8085, 8086 and 8051 by Soumitra Kumar Mandal
11.  Introduction to Microprocessors and Microcontrollers by Crisp John Crisp
12.  Microprocessors And Microcontrollers by A Nagoor Kani
13.  Microprocessors And Microcontrollers : Architecture, Programming and System Design 8085, 8086, 8051, 8096 by KRISHNA KANT

 

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