Microprocessors and Microcontrollers BE (EE/EEE) 5th sem


 

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Microprocessor - 8086 Instruction Sets

MICROPROCESSOR - 8086 INSTRUCTION SETS The first generation of computer language was the machine language in which to get an operation from the microprocessor it was to be instructed by supplying a sequence of zeros (0) and ones (1), but remembering the binary code for different operations was cumbersome. So some symbolic names called 'mnemonic' were developed which are easy to remember by the programmer. These mnemonics are called the instructions of the microprocessor. The set of different mnemonics used for programming the microprocessor are called the instruction set, and the language using the mnemonics is called assembly language. The instruction set of the 8086 fall under the following groups according to their functionality. The 8086 microprocessor supports 8 types of instructions − 1.        Data Transfer Instructions 2.        Arithmetic Instructions 3.        Logical Instructions  OR Bit Manipulation Instructions 4.        String Manipulation Instructions 5.        P
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8086 pins configuration

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8086 pins configuration The description of the pins of 8086 is as follows: AD0-AD15 (Address Data Bus):  Bidirectional address/data lines. These are low order address bus. They are multiplexed with data. When these lines are used to transmit memory address, the symbol A is used instead of AD, for example, A0- A15. A16 - A19 (Output):  High order address lines. These are multiplexed with status signals. A16/S3, A17/S4:  A16 and A17 are multiplexed with segment identifier signals S3 and S4. A18/S5:  A18 is multiplexed with interrupt status S5. A19/S6:  A19 is multiplexed with status signal S6. BHE /S7 (Output):  Bus High Enable/Status. During T1, it is low. It enables the data onto the most significant half of data bus, D8-D15. 8-bit device connected to upper half of the data bus use BHE signal. It is multiplexed with status signal S7. S7 signal is available during T3 and T4. RD  (Read):  For read operation. It is an output signal. It is active when LOW. Ready (Input):  The addressed mem
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8255A - Programmable Peripheral Interface

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8255A - Programmable Peripheral Interface The 8255A is a general-purpose programmable I/O device designed to transfer the data from I/O to interrupt I/O under certain conditions as required. It can be used with almost any microprocessor. It consists of three 8-bit bidirectional I/O ports (24 I/O lines) which can be configured as per the requirement. Ports of 8255A 8255A has three ports, i.e., PORT A, PORT B, and PORT C. Port A contains one 8-bit output latch/buffer and one 8-bit input buffer. Port B is similar to PORT A. Port C can be split into two parts, i.e. PORT C lower (PC0-PC3) and PORT C upper (PC7-PC4) by the control word. These three ports are further divided into two groups, i.e. Group A includes PORT A and upper PORT C. Group B includes PORT B and lower PORT C. These two groups can be programmed in three different modes, i.e. the first mode is named as mode 0, the second mode is named as Mode 1 and the third mode is named as Mode 2. Features of 8255 A The prominent features
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