Microprocessors and Microcontrollers ( 5th Semester Syllabus):-Upcoming topics

Unit-I

Architecture of 8086 Microprocessor: - BIU and EU, register organization, pin diagram, memory organization, clock generator 8284, buffers and latches, 8288 bus controller, maximum and minimum mode.

Unit-II

Assembly Language Programming of 8086:- Instruction formats, addressing modes, instruction set, assembly language programming. ALP tools- editor, assembler, linker, locator, debugger, emulator.

8086-based multiprocessor systems:- Interconnection topologies, coprocessors 8087 NDP. I/O processors 8089 IOP, bus arbitration and control, lightly and tightly coupled systems.

Unit-III

Peripheral devices and their interfacing:- Memory interfacing. Programmable input/output ports 8255. Programmable interval timer 8253, keyboard display controller 8279, CRT controller 8275. Programmable communication interface 8251 USART

Unit IV

Interrupts of 8086:- Interrupts and interrupt service routine, interrupt cycle, maskable and non-maskable interrupts, interrupt programming Programmable interrupt controller 8259. DMA in 8086 Basic DMA operation, modes of DMA transfer DMA controller 8257

Unit-V

8051 Microcontroller:- Features, architecture. Pin Diagram memory organization external memory interfacing instruction syntax, data types, subroutines. addressing Modes, instruction set. ALP of 8051 Applications of 8051.

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8086 pins configuration

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8086 pins configuration The description of the pins of 8086 is as follows: AD0-AD15 (Address Data Bus):  Bidirectional address/data lines. These are low order address bus. They are multiplexed with data. When these lines are used to transmit memory address, the symbol A is used instead of AD, for example, A0- A15. A16 - A19 (Output):  High order address lines. These are multiplexed with status signals. A16/S3, A17/S4:  A16 and A17 are multiplexed with segment identifier signals S3 and S4. A18/S5:  A18 is multiplexed with interrupt status S5. A19/S6:  A19 is multiplexed with status signal S6. BHE /S7 (Output):  Bus High Enable/Status. During T1, it is low. It enables the data onto the most significant half of data bus, D8-D15. 8-bit device connected to upper half of the data bus use BHE signal. It is multiplexed with status signal S7. S7 signal is available during T3 and T4. RD  (Read):  For read operation. It is an output signal. It is active when...
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Architecture of 8086

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A   Microprocessor   is an Integrated Circuit with all the functions of a CPU. However, it cannot be used stand-alone since unlike a microcontroller it   has no memory or peripherals .  8086 does not have RAM or ROM inside it. However, it has  internal registers  for storing intermediate and final results and interfaces with memory located outside it through the System Bus.  In the case of 8086, it is a 16-bit  Integer processor  in a 40-pin, Dual Inline Packaged IC.  The size of the internal registers(present within the chip) indicates how much information the processor can operate on at a time ( in this case 16-bit registers ) and how it moves data around internally within the chip, sometimes also referred to as the internal data bus.  8086 provides the programmer with 14 internal registers, each of 16 bits or 2 bytes wide.  The main advantage of the 8086 microprocessor is that it supports Pipelining. 8086 Architecture M...
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Assignment Questions (Subject:- Microprocessor and Microcontroller)

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