Advanced Microprocessor & Interfacing

 

Unit-I Architecture of 8086 Microprocessor: -  BIU and EU, register organization, pin diagram, memory organization, clock generator 8284, buffers and latches, 8288 bus controller, maximum and minimum mode. Unit-II Assembly Language Programming of 8086:-  Instruction formats, addressing modes, instruction set, assembly language programming. ALP tools- editor, assembler, linker, locator, debugger, emulator. 8086-based multiprocessor systems:-  Interconnection topologies, coprocessors 8087 NDP. I/O processors 8089 IOP, bus arbitration and control, lightly and tightly coupled systems. Unit-III Peripheral devices and their interfacing:-  Memory interfacing. Programmable input/output ports 8255. Programmable interval timer 8253, keyboard display controller 8279, CRT controller 8275. Programmable communication interface 8251 USART Unit IV Interrupts of 8086:-  Interrupts and interrupt service routine, interrupt cycle, maskable and non-maskable interrupts, interrupt programming

8255A - Programmable Peripheral Interface The 8255A is a general-purpose programmable I/O device designed to transfer the data from I/O to interrupt I/O under certain conditions as required. It can be used with almost any microprocessor. It consists of three 8-bit bidirectional I/O ports (24 I/O lines) which can be configured as per the requirement. Ports of 8255A 8255A has three ports, i.e., PORT A, PORT B, and PORT C. Port A contains one 8-bit output latch/buffer and one 8-bit input buffer. Port B is similar to PORT A. Port C can be split into two parts, i.e. PORT C lower (PC0-PC3) and PORT C upper (PC7-PC4) by the control word. These three ports are further divided into two groups, i.e. Group A includes PORT A and upper PORT C. Group B includes PORT B and lower PORT C. These two groups can be programmed in three different modes, i.e. the first mode is named as mode 0, the second mode is named as Mode 1 and the third mode is named as Mode 2. Features of 8255 A The prominent features

Programmable Serial Communication Interface 8251 USART 8251 universal synchronous asynchronous receiver transmitter (USART) acts as a mediator between the microprocessor and peripheral to transmit serial data into parallel form and vice versa. It takes data serially from peripheral (outside devices) and converts it into parallel data. After converting the data into parallel form, it transmits it to the CPU. Similarly, it receives parallel data from the microprocessor and converts it into serial form. After converting data into a serial form, it transmits it to the outside device (peripheral). The pin description of the 8251A chip Pin Description D 0   - D 7 parallel data C/D Control register or Data buffer select RD Read Control WR Write control CS Chip Select CLK clock pulse RESET Reset TxC